Hardware engineer (System LSI development)ID:10569
1,000 USD ~ 1,500 USDDist 33ヶ月以上前概要
給与
1,000 USD ~ 1,500 USD
業界
Software
仕事内容
System LSI design and Third-party verification business
求めている人材
応募条件
【Requirements】
Front-end design and verification of ASIC
RTL design by VerilogHDL/VHDL
Design and verification using a general-purpose bus AMBA(AXI/APB) and OCP
Assertion-Based Verification
【Welcome skills】
Design and verification of ASIC built-in CPU
Design and verification of high-speed interfaces such as PCI Express and USB
Random verification using SystemVerilog
Testbench building that was applied verification methodology(UVM)
English skill(overseas business trip, meeting with overseas engineers)
【Skill improvement】
Advanced verification techniques such as coverage driven verification and Random verification
Global business experience英語
Conversational Level
その他言語
None
その他
福利厚生
-
就業時間
8:30 ~ 17:30
休日
-
職種